A prober is known as a substrate inspection apparatus which inspects electric characteristics of a semiconductor device, such as a power device or a memory, formed on a semiconductor wafer (hereinafter, simply referred to as “wafer”) as a substrate.
The prober includes a probe card having a multiple number of probe needles, and a stage configured to be freely moved in upward, downward, leftward and rightward directions while holding a wafer thereon. The prober inspects electric characteristics of a semiconductor device by bringing the probe needles of the probe card into contact with electrode pads or solder bumps of the semiconductor device, so that inspection currents are flown to the electrode pads or the solder bumps from the probe needles (refer to, for example, Patent Document 1).
Conventionally, the prober includes an IC tester, which is a dedicated circuit for measuring the electric characteristics, e.g., a resistance of a semiconductor device. This IC tester has a circuit configuration different from a circuit configuration of a circuit board, such as a mother board or a function extension card, on which manufactured semiconductor devices are mounted. Accordingly, the IC tester cannot inspect the semiconductor device in an actually mounted state. As a result, there is a problem that an error of the semiconductor device, which has not been detected in the IC tester, might be found when the semiconductor device is actually mounted on the function extension card, etc. Recently, as processes implemented by the mother board or the function extension card become complicated and high-speed, the circuit configuration of the mother board or the function extension is also getting complicated, and a difference from the circuit configuration of the IC tester is increased. Thus, the above-mentioned problem is becoming more serious.
Accordingly, in order to ensure the quality of a semiconductor device, in addition to the testing by the IC tester, re-inspection of the semiconductor device, e.g., an operation test has been carried out after mounting the semiconductor device separated from the wafer on the mother board or the function extension card before shipping the mother board or the function extension card. The inspection in such a mounted state is called a system level test.    Patent Document 1: Japanese Laid-open Patent Publication No. H07-297242
However, if the error of the semiconductor device is found in the state where the semiconductor device is mounted on the mother board or the function extension card, it will result in waste of man-hour, materials, and so forth that have been consumed until then.